BUILT-IN TESTING OF INTEGRATED-CIRCUIT WAFERS

被引:25
作者
RANGARAJAN, S [1 ]
FUSSELL, D [1 ]
MALEK, M [1 ]
机构
[1] UNIV TEXAS,DEPT ELECT & COMP ENGN,AUSTIN,TX 78712
关键词
Built-in testing; integrated circuit; testing; wafer-sale integration;
D O I
10.1109/12.45205
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Production testing of a digital circuit requires the generation of a sequence of tests and their application to the circuit being tested. Currently, in test application, the output of the circuit under test is compared to a known correct output for each test. This method has some drawbacks likely to become more critical in the near future. In homogeneous systems of identical integrated circuits on silicon wafers, testing can be done in another way— by applying a common test to several processing elements at once and comparing the results produced by them. We analyze such schemes and show that perhaps surprisingly they are inherently as accurate as current methods that use assumed correct results for production testing. Since this approach could allow wafers to be tested for production faults significantly faster than by using a probe tester, our results indicate that it may provide an attractive alternative to current methods for production testing of silicon wafers. © 1990 IEEE
引用
收藏
页码:195 / 205
页数:11
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