NOVEL BIPOLAR-TRANSISTOR ISOLATION STRUCTURE USING COMBINED SELECTIVE EPITAXIAL-GROWTH AND PLANARIZATION TECHNIQUE

被引：1

作者：

BURGHARTZ, JN

WARNOCK, J

CRESSLER, JD

STANIS, CL

MCINTOSH, RC

SUN, JYC

COMFORT, JH

STORK, JMC

JENKINS, KA

CRABBE, EF

LEE, W

GILBERT, M

机构：

[1] IBM Research Division, Thomas J. Watson Research Center Yorktown Heights, New York

来源：

MICROELECTRONIC ENGINEERING | 1992年 / 19卷 / 1-4期

关键词：

D O I：

10.1016/0167-9317(92)90489-E

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A novel bipolar isolation structure with capability of significantly reducing and base resistance is presented. A silicon-on-insulator (SOI) region surrounding the collector opening is used to minimize the collector window width, and to increase the thickness of the extrinsic base contact layer for a given device topography. This partial-SOI isolation structure can be combined with any type of emitter-base self-aligned bipolar transistor structure.

引用

页码：531 / 534

页数：4

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