SELF-TIMED SYSTEM-DESIGN TECHNIQUE

被引：0
作者：
TAN, YK
LIM, YC
机构：
[1] Electrical Engineering Department National University of Singapore, 10 Kent Ridge Crescent
来源：
ELECTRONICS LETTERS | 1990年 / 26卷 / 05期
关键词：
Circuit theory and design; Digital circuits; Timing circuits;
D O I：
10.1049/el:19900188
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A new technique for the design of self-timed systems using a modified PCVSL (Precharged Cascode Voltage Switch Logic) circuit and a new handshaking protocol is presented. Our technique allows different data to be stored and computed in consecutive PCVSL pipeline stages simultaneously, resulting in a significant saving in silicon area and speed-up in fall-through delay. © 1990, The Institution of Electrical Engineers. All rights reserved.
引用
收藏
页码：284 / 286
页数：3
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