THE RELIABILITY OF SEMICONDUCTOR RAM MEMORIES WITH ON-CHIP ERROR-CORRECTION CODING

被引:28
|
作者
GOODMAN, RM
SAYANO, M
机构
[1] California Institute of Technology, Pasadena, CA 91125
关键词
D O I
10.1109/18.79957
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The mean lifetimes are studied of semiconductor memories that have been encoded with an on-clip single error-correcting code along each row of memory cells. Specifically, the effects of single-cell soft errors and various hardware failures (single-cell, row, column, row-column, and entire chip) in the presence of soft-error scrubbing are examined. An expression is presented for computing the mean time to failure of such memories in the presence of these types of errors using the Poisson approximation; the expression has been confirmed experimentally to accurately model the mean time to failure of memories protected by single error-correcting codes. These analyses will enable the system designer to accurately assess the improvement in mean time to failure (MTTF) bought by the use of error-control coding.
引用
收藏
页码:884 / 896
页数:13
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