DESIGN AND TECHNOLOGY ASPECTS OF VLSIS FOR ATM SWITCHES

For the future B-ISDN switching systems based on ATM, a set of new and challenging requirements in terms of functionalities and complexity comes up leading to novel system architectures. A new system concept is presented which is based on a multipath self-routing switching principle and an internal transfer mode using multislot cells. Together with the utilization of a shared buffer memory structure, this concept allows for a single-chip realization of the switching elements and fulfills important system requirements like fault tolerance, independence of the switch core from external data formats and traffic characteristics, and modular extendability from small to very large systems. An example for implementation of the said system concept with the resulting functional partitioning in boards and chips is given. Performance study results, as a basis for dimensioning, are also mentioned. Latest CMOS and BiCMOS technologies have to be applied for the realization of the chipset in order to reach the required range of complexity, speed, and power dissipation. Future technologies will bring a lot of advantages to several design aspects. A technology road-map is given to explain the expected evolutions. Advanced design methodologies and tools are mandatory to bring the design of this set of highly complex VLSI's to success. A possible tool chain exploiting a hardware description language, logic simulator, and logic compiler is described.