PERFORMANCE ANALYSIS OF SINGLE STAGE INTERCONNECTION NETWORKS

被引：3

作者：

BURKE, JR ^{[1
]}

CHEN, CH ^{[1
]}

LEE, TY ^{[1
]}

AGRAWAL, DP ^{[1
]}

机构：

[1] N CAROLINA STATE UNIV,DEPT ELECT & COMP ENGN,COMP SCI LAB,RALEIGH,NC 27695

来源：

IEEE TRANSACTIONS ON COMPUTERS | 1991年 / 40卷 / 03期

关键词：

ANALYTICAL MODEL; DYNAMIC AVERAGE PATHLENGTH; INTERCONNECTION NETWORKS; QUEUING; SIMULATION; SINGLE STAGE NETWORKS; SWITCH CONFLICT RESOLUTION STRATEGIES;

D O I：

10.1109/12.76415

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A single stage interconnection network (SSIN) consists of only one stage of switches and recirculation through processors is used to provide the desired source-destination permutations. This correspondence introduces an analytical probability model for SSIN's using 2 x 2 switches and compares it to simulation results. Four SSIN's with different network sizes, loading, and routing strategies are considered. Two possible cases of processors with and without buffers and three different routing strategies have been applied in resolving conflicts. The analytical model is seen to be in close agreement with the simulation results while it provides at least an order of magnitude reduction in CPU time.

引用

页码：357 / 365

页数：9

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