A BIST SCHEME FOR A SNR, GAIN TRACKING, AND FREQUENCY-RESPONSE TEST OF A SIGMA-DELTA ADC

被引：68

作者：

TONER, MF

ROBERTS, GW

机构：

[1] Department of Electrical Engineering, Microelectronics and Computer Systems Laboratory, McGill University, Montreal

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING | 1995年 / 42卷 / 01期

基金：

加拿大自然科学与工程研究理事会;

关键词：

D O I：

10.1109/82.363546

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Built-in-self test (BIST) for VLSI systems is desirable in order to reduce the cost per chip of production-time testing by the manufacturer, In addition, it can provide the means to perform in-the-held diagnostics, This paper discusses a mixed analog-digital BIST (MADBIST) for a signal-to-noise-ratio test, gain tracking test, and frequency response test of a Sigma-Delta analog-to-digital converter, The MADBIST strategy for the SNR, GT, and FR tests of the ADC is introduced, accuracy issues are discussed, and experimental results are presented.

引用

页码：1 / 15

页数：15

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