NOVEL FABRICATION PROCESS FOR SI3N4 PASSIVATED INALAS/INGAAS/INP HFETS

被引：13
作者：
DICKMANN, J
RIEPE, K
HASPEKLO, H
MAILE, B
DAEMBKES, H
NICKEL, H
LOSCH, R
SCHLAPP, W
机构：
[1] RHEIN WESTFAL TH AACHEN,INST SEMICOND,W-5100 AACHEN,GERMANY
[2] BP TELEKOM,RES CTR,W-6100 DARMSTADT,GERMANY
来源：
ELECTRONICS LETTERS | 1992年 / 28卷 / 19期
关键词：
SEMICONDUCTOR DEVICES AND MATERIALS; FIELD-EFFECT TRANSISTORS; MICROWAVE DEVICES;
D O I：
10.1049/el:19921179
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The process technology of fully passivated T-shaped 0.18-mu-m gate length InAlAs/InGaAs/InP HFETs is described. Using material selective etchants, devices realised with this process yielded gate breakdown voltages in excess of 8 V and drain source breakdown voltages in excess of 5 V. The excellent gate characteristics lead to a noise figure of 0.75 dB at 18 GHz with 13 dB associated gain. The extrapolated maximum frequency of oscillation was determined to be f(max) = 290 GHz.
引用
收藏
页码：1849 / 1850
页数：2
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