A DESIGN OF PROGRAMMABLE LOGIC-ARRAYS WITH UNIVERSAL TESTS

被引：6

|

作者：

FUJIWARA, H

KINOSHITA, K

机构：

[1] OSAKA UNIV,DEPT ELECTR ENGN,OSAKA,JAPAN

[2] HIROSHIMA UNIV,DEPT INFORMAT & BEHAV SCI,HIROSHIMA 730,JAPAN

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS | 1981年 / 28卷 / 11期

关键词：

D O I：

10.1109/TCS.1981.1084932

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

收藏

页码：1027 / 1032

页数：6

相关论文

共 50 条

[1] A DESIGN OF PROGRAMMABLE LOGIC-ARRAYS WITH UNIVERSAL TESTS
FUJIWARA, H
KINOSHITA, K
IEEE TRANSACTIONS ON COMPUTERS, 1981, 30 (11) : 823 - 828
[2] LOGIC DESIGN OF PROGRAMMABLE LOGIC-ARRAYS
KAMBAYASHI, Y
IEEE TRANSACTIONS ON COMPUTERS, 1979, 28 (09) : 609 - 617
[3] UNIVERSAL SYNDROME-TESTABLE DESIGN OF PROGRAMMABLE LOGIC-ARRAYS
YANG, TC
CHIOU, CW
INTEGRATION-THE VLSI JOURNAL, 1990, 10 (01) : 3 - 8
[4] OPTICAL DESIGN OF PROGRAMMABLE LOGIC-ARRAYS
MURDOCCA, MJ
HUANG, A
JAHNS, J
STREIBL, N
APPLIED OPTICS, 1988, 27 (09): : 1651 - 1660
[5] A TESTABLE DESIGN OF PROGRAMMABLE LOGIC-ARRAYS WITH UNIVERSAL CONTROL AND MINIMAL OVERHEAD
SALUJA, KK
FUJIWARA, H
KINOSHITA, K
COMPUTERS & MATHEMATICS WITH APPLICATIONS, 1987, 13 (5-6) : 503 - 517
[6] PROGRAMMABLE LOGIC-ARRAYS
PROUDFOOT, JT
ELECTRONICS AND POWER, 1980, 26 (11): : 883 - 887
[7] LOGIC DESIGN OF DECODED-PROGRAMMABLE LOGIC-ARRAYS
XIAO, YX
INTERNATIONAL JOURNAL OF ELECTRONICS, 1990, 69 (03) : 317 - 325
[8] METHODS FOR CONSTRUCTING VERIFICATION TESTS FOR PROGRAMMABLE LOGIC-ARRAYS
VOLYNSKII, MB
NOVOSELOV, VG
SOVIET MICROELECTRONICS, 1983, 12 (01): : 35 - 43
[9] OPTIMIZATION OF PROGRAMMABLE LOGIC-ARRAYS
MAK, RH
INTEGRATION-THE VLSI JOURNAL, 1984, 2 (02) : 149 - 162
[10] DESIGNING WITH PROGRAMMABLE LOGIC-ARRAYS
MAUNDY, B
MICROPROCESSORS AND MICROSYSTEMS, 1987, 11 (09) : 475 - 486

← 1 2 3 4 5 →