A GRACEFULLY DEGRADABLE VLSI SYSTEM FOR LINEAR-PROGRAMMING

[1] ADLER I, 1986, MATH PROGRAMMING, V35

[2] ATALLAH MJ, 1985, IEEE T COMPUT, V34, P151, DOI 10.1109/TC.1985.1676551

[3] BERTOSSI AA, 1987, IEEE T COMPUT, V36, P241, DOI 10.1109/TC.1987.1676889

[4] A MINIMUM AREA VLSI NETWORK FOR O(LOG N) TIME SORTING [J]. IEEE TRANSACTIONS ON COMPUTERS, 1985, 34 (04) : 336 - 343

[5] Bonuccelli M. A., 1983, 10th Annual International Conference on Computer Architecture Conference Proceedings, P67, DOI 10.1145/800046.801640

[6] BRENT RP, 1980, INFORM PROCESS LETT, V11, P44

[7] FORTES JAB, 1985, IEEE T COMPUT, V34, P1033, DOI 10.1109/TC.1985.1676536

[8] CONFIGURATION OF VLSI ARRAYS IN THE PRESENCE OF DEFECTS [J]. JOURNAL OF THE ACM, 1984, 31 (04) : 694 - 717

[9] Grey B. O. A., 1984, Fourteenth International Conference on Fault-Tolerant Computing. Digest of Papers (Cat. No. 84CH2050-3), P232

[10] HASSAN ASM, 1986, IEEE T COMPUT, V35, P356, DOI 10.1109/TC.1986.1676770

[1] ADLER I, 1986, MATH PROGRAMMING, V35

[2] ATALLAH MJ, 1985, IEEE T COMPUT, V34, P151, DOI 10.1109/TC.1985.1676551

[3] BERTOSSI AA, 1987, IEEE T COMPUT, V36, P241, DOI 10.1109/TC.1987.1676889

[4] A MINIMUM AREA VLSI NETWORK FOR O(LOG N) TIME SORTING [J]. IEEE TRANSACTIONS ON COMPUTERS, 1985, 34 (04) : 336 - 343

[5] Bonuccelli M. A., 1983, 10th Annual International Conference on Computer Architecture Conference Proceedings, P67, DOI 10.1145/800046.801640

[6] BRENT RP, 1980, INFORM PROCESS LETT, V11, P44

[7] FORTES JAB, 1985, IEEE T COMPUT, V34, P1033, DOI 10.1109/TC.1985.1676536

[8] CONFIGURATION OF VLSI ARRAYS IN THE PRESENCE OF DEFECTS [J]. JOURNAL OF THE ACM, 1984, 31 (04) : 694 - 717

[9] Grey B. O. A., 1984, Fourteenth International Conference on Fault-Tolerant Computing. Digest of Papers (Cat. No. 84CH2050-3), P232

[10] HASSAN ASM, 1986, IEEE T COMPUT, V35, P356, DOI 10.1109/TC.1986.1676770