HIGH-PRECISION OPTICAL LITHOGRAPHY FOR GATE PROCESS USING AN ANTIREFLECTIVE UNDERCOATING AND LOCAL EXPOSURE DOSE CONTROL

A high-precision optical lithography for gate fabrication has been developed. The main factors that degrade gate length accuracy are interference effects on the resist film and etching nonuniformity caused by the poly-Si etcher. To reduce the interference effect, we developed a new resist process that makes it possible to employ the developer-soluble antireflective undercoating SWK. Using SWK results in remarkable CD controllability and pattern accuracy. To compensate etching nonuniformity, we developed the Local Exposure dose Control (LEC) method, in which the exposure dose is corrected according to the CD distribution after etching. These two techniques are applied to a 0.5- mu m- gate fabrication process for ASIC LSIs using a g-line stepper. Size variation within +/- 30 nm is obtained after etching on all the wafers. This process leads to a large improvement in the uniformity of MOSFET threshold voltages.