FIREFLY - A MULTIPROCESSOR WORKSTATION

被引:52
作者
THACKER, CP
STEWART, LC
SATTERTHWAITE, EH
机构
关键词
D O I
10.1109/12.2243
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
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页码:909 / 920
页数:12
相关论文
共 16 条
[1]   A CMOS VAX MICROPROCESSOR WITH ON-CHIP CACHE AND MEMORY MANAGEMENT [J].
ARCHER, DW ;
DEVERELL, DR ;
FOX, TF ;
GRONOWSKI, PE ;
JAIN, AK ;
LEARY, M ;
MINER, DG ;
OLESIN, A ;
PERSELS, SD ;
RUBINFELD, PI ;
SUPNIK, RM .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1987, 22 (05) :849-852
[2]   CACHE COHERENCE PROTOCOLS - EVALUATION USING A MULTIPROCESSOR SIMULATION-MODEL [J].
ARCHIBALD, J ;
BAER, JL .
ACM TRANSACTIONS ON COMPUTER SYSTEMS, 1986, 4 (04) :273-298
[3]  
BIRRELL AD, 1987, 20 DEC SYST RES CTR
[4]  
DOBBERNPUHL DW, 1986, DIG TECH J MAR
[5]  
Emer J. S., 1984, 11th Annual International Symposium on Computer Architecture. Conference Proceedings (Cat. No. 84CH2051-1), P301, DOI 10.1145/800015.808199
[6]  
Ingalls D. H. H., 1981, BYTE, V6, P168
[7]  
KARLIN AR, 1986, 27TH P ANN S F COMP, P214
[8]  
KATZ RH, 1985, 12TH P INT S COMP AR
[9]  
Lazowska E. D., 1984, QUANTITATIVE SYSTEM
[10]  
MCCREIGHT EM, 1984, NATO ADV STUDY I MIC