PHYSICS-BASED CIRCUIT-LEVEL MODEL FOR SUBMICRON MOSFETS

被引:3
作者
VELGHE, RMD
KLAASSEN, FM
机构
[1] Philips Research Laboratories P.O. Box 80.000
关键词
D O I
10.1016/0167-9317(91)90219-4
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A good circuit-level model for well-scaled submicron MOSFETs is needed in circuit simulators to design integrated circuits with these transistors in an accurate way. Due to the scaling, thinner gate insulators are required and give rise to an increase of the normal electric field in the oxide region. So the effect of surface roughness on the drain current becomes manifest. In addition a further reduction of the current is caused by the increased effect of series resistance caused by the use of graded source/drain junctions. This paper presents a physics-based circuit-level model where these effects are quantitatively taken into account.
引用
收藏
页码:229 / 232
页数:4
相关论文
共 6 条
  • [1] Klaassen, ESSDERC 90, (1990)
  • [2] Ando, Fowler, Stern, Electronic properties of two-dimensional systems, Review of modern physics, 54, pp. 437-672, (1982)
  • [3] Walker, Woerlee, ESSDERC 88, pp. C4-C265, (1988)
  • [4] Klaassen, Et al., Compact Modelling of the MOSFET Drain Conductance, ESSDERC 89, (1989)
  • [5] Sun, Et al., On the accuracy of channel length characterization of LDD MOSFET's, IEEE Transactions on Electron Devices, 33 ED, (1989)
  • [6] Otten, Klaassen, ESSDERC 91, (1991)