A MODEL FOR COMPARING SYNCHRONIZATION STRATEGIES FOR PARALLEL LOGIC-LEVEL SIMULATION

被引：0
|
作者：
BAILEY, ML
SNYDER, L
机构：
来源：
1989 IEEE INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN: DIGEST OF TECHNICAL PAPERS | 1989年
关键词：
D O I：
10.1109/ICCAD.1989.77000
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：502 / 505
页数：4
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