ANALYSIS OF THE QUASI-SATURATION BEHAVIOR CONSIDERING THE DRAIN-TO-SOURCE VOLTAGE AND CELL-SPACING EFFECTS FOR A VERTICAL DMOS POWER TRANSISTOR

被引：13

作者：

LOU, KH

LIU, CM

KUO, JB

机构：

[1] Room 526, Department of Electrical Engineering, National Taiwan University, Roosevelt Road No. 1, Section 4, Taipei

来源：

SOLID-STATE ELECTRONICS | 1993年 / 36卷 / 01期

关键词：

D O I：

10.1016/0038-1101(93)90072-X

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper reports an analysis of the quasi-saturation behavior considering the drain-to-source voltage (V(DS)) and cell-spacing effects for a vertical DMOS power transistor. Considering the unique electron distribution in the substrate, a V(DS) dependent quasi-saturation analytical model has been developed. As verified by the PISCES results, the analytical model provides an explanation of the cell-spacing-dependent quasi-saturation behavior in a DMOS device.

引用

页码：85 / 91

页数：7

共 9 条

[1]

BALIGA BJ, 1987, MODERN POWER DEVICES

[2] STUDY OF THE QUASI-SATURATION EFFECT IN VDMOS TRANSISTORS [J].

DARWISH, MN .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1986, 33 (11) :1710-1716

[3]

Grant D., 1989, POWER MOSFETS THEORY

[4]

HU CM, 1984, IEEE T ELECTRON DEV, V31, P1693

[5] PHYSICAL DMOST MODELING FOR HIGH-VOLTAGE IC CAD [J].

KIM, YS ;

FOSSUM, JG .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1990, 37 (03) :797-803

[6]

KUO JB, 1990, IEEE T ELECTRON MAY

[7]

PINTO MR, 1984, PISCES, V2

[8] OPTIMALLY SCALED LOW-VOLTAGE VERTICAL POWER MOSFETS FOR HIGH-FREQUENCY POWER CONVERSION [J].

SHENAI, K .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1990, 37 (04) :1141-1153

[9] A Circuit Simulation Model for High-Frequency Power MOSFET's [J].

Shenai, Krishna .

IEEE TRANSACTIONS ON POWER ELECTRONICS, 1991, 6 (03) :539-547

← 1 →