DEFECT POOL IN AMORPHOUS-SILICON THIN-FILM TRANSISTORS

Amorphous-silicon thin-film transistors show a threshold voltage shift when subjected to prolonged bias stress. For transistors made with silicon oxide as the gate dielectric, the threshold shift induced under positive bias is due to the creation of dangling-bond states in the a-Si:H at low energy (D(e) states). The threshold shift induced by negative bias stress is due to the creation of dangling-bond states at a higher energy (D(h) states). In transistors made with silicon nitride as the gate dielectric, positive bias stress causes an increase in the density of D(e) states, but negative bias stress causes mainly a reduction in the density of D(e) states. Positive bias annealing of both oxide and nitride transistors leads to an increase in the density of D(e) states and a reduction in the density of D(h) states. Negative bias annealing leads to a reduction in the density of D(e) states and an increase in the density of D(h) states. The magnitude of each change depends on the initial Fermi-level position, which is the main difference between our oxide and nitride transistors. The results are explained by a defect-pool model for the dangling-bond states in a-Si:H. Dangling bonds are formed by a chemical equilibration process, resulting in the formation of dangling bonds in each of the possible charge states. This leads to a density of states in a-Si:H consisting of coexisting components formed as negatively charged dangling bonds (D(e) states), positively charged dangling bonds (D(h) states), and neutral dangling bonds (D0 states). Fitting the calculated density of states to the experimental results determined from the transistor characteristics leads to the conclusion that the density of D(e) and D(h) states dominates over the D0 states, for all Fermi-level positions. We therefore conclude that there must be substantial densities of charged dangling bonds, even in undoped a-Si:H. Because of the wide energy separation of the D(e), D0, and D(h) states, virtually all the states in the lower part of the gap are D(e) states and all the states in the upper part of the gap are D(h) states. Raising the Fermi level increases the density of D(e) states and lowers the density of D(h) states, but the density of D0 states remains the same. Lowering the Fermi level increases the density of D(h) states and reduces the density of D(e) states. Bias stress of nitride transistors, at much higher fields, leads to larger threshold voltage shifts, due to charge trapping in the nitride. Subsequent annealing leads to a new zero-bias thermal-equilibrium density of states. Transistor characteristics can be optimized in this way.