CROSSTALK ON DIGIT LINES IN A PLATED-WIRE MEMORY STACK USING A FERRITE KEEPER

被引:0
作者
ITOH, K [1 ]
SAITO, N [1 ]
机构
[1] HITACHI LTD,CENT RES LAB,KOKUBUNJI 185,JAPAN
来源
ELECTRONICS & COMMUNICATIONS IN JAPAN | 1976年 / 59卷 / 06期
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:139 / 146
页数:8
相关论文
共 36 条
[31]   HIGH SENSITIVITY PLATED-WIRE SENSOR USING SECOND HARMONIC OSCILLATION AND ITS APPLICATIONS [J].
OSHIMA, S ;
WATANABE, T ;
FUKIU, T .
IEEE TRANSACTIONS ON MAGNETICS, 1971, MAG7 (03) :436-&
[32]   MAGNETIC-FIELD COMPUTATION FOR A PLATED-WIRE MEMORY UTILIZING AN INTEGRAL/MATRIX-EQUATION TECHNIQUE [J].
LOTSCH, HKV .
JOURNAL OF APPLIED PHYSICS, 1969, 40 (07) :2844-&
[33]   PROGRESS REPORT ON DEVELOPMENT OF PLATED-WIRE MEMORY .1. DRO HIGH-SPEED SYSTEM [J].
IHARA, H ;
HABA, Y ;
UEKI, I ;
HOSODA, K .
NEC RESEARCH & DEVELOPMENT, 1971, (23) :30-&
[34]   PROGRESS REPORT ON DEVELOPMENT OF PLATED-WIRE MEMORY .2. NDRO LOW-COST SYSTEM [J].
MATSUMOT.H ;
HIKI, Y ;
KUROKAWA, H .
NEC RESEARCH & DEVELOPMENT, 1971, (23) :41-&