CROSSTALK ON DIGIT LINES IN A PLATED-WIRE MEMORY STACK USING A FERRITE KEEPER

被引:0
作者
ITOH, K [1 ]
SAITO, N [1 ]
机构
[1] HITACHI LTD,CENT RES LAB,KOKUBUNJI 185,JAPAN
来源
ELECTRONICS & COMMUNICATIONS IN JAPAN | 1976年 / 59卷 / 06期
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
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页码:139 / 146
页数:8
相关论文
共 36 条
[11]   HIGH-SPEED PLATED-WIRE MEMORY SYSTEM [J].
WAABEN, S .
IEEE TRANSACTIONS ON ELECTRONIC COMPUTERS, 1967, EC16 (03) :335-+
[12]   WRITE-NOISE RELAXATION IN A PLATED-WIRE MEMORY [J].
BIRKNER, JM .
IEEE TRANSACTIONS ON MAGNETICS, 1971, MAG7 (03) :505-&
[13]   4K-WORD PLATED-WIRE MEMORY [J].
NITTA, M ;
ISHII, O ;
WATANABE, S .
ELECTRONICS & COMMUNICATIONS IN JAPAN, 1968, 51 (11) :110-&
[14]   A 3-DIMENSIONAL OPERATION IN PLATED-WIRE MEMORY [J].
MURAKAMI, H ;
WADA, Y .
IEEE TRANSACTIONS ON MAGNETICS, 1969, MAG5 (03) :422-&
[15]   HIGH-SPEED DRO PLATED-WIRE MEMORY SYSTEM [J].
FINCH, TR ;
WAABEN, S .
IEEE TRANSACTIONS ON MAGNETICS, 1966, MAG2 (03) :529-&
[16]   DESIGN OF A 1.5-MILLION-BIT PLATED-WIRE MEMORY [J].
FEDDE, GA .
JOURNAL OF APPLIED PHYSICS, 1966, 37 (03) :1373-&
[17]   MAGNETIC-FIELD DESIGN CONSIDERATIONS FOR A PLATED-WIRE MEMORY [J].
LOTSCH, HKV .
IEEE TRANSACTIONS ON COMPUTERS, 1969, C 18 (10) :894-&
[18]   50-MU-M PLATED-WIRE MAINFRAME MEMORY [J].
ORIHARA, S ;
KAWAKAMI, S ;
HOSHI, T ;
SEGAWA, S .
IEEE TRANSACTIONS ON MAGNETICS, 1972, MAG8 (03) :364-366
[19]   PLATED-WIRE MEMORIES - UNIVACS BET TO REPLACE TOROIDAL FERRITE CORES [J].
FEDDE, GA .
ELECTRONICS, 1967, 40 (10) :101-&
[20]   CONSIDERATION OF BIT-DENSITY LIMITATIONS IN PLATED-WIRE MEMORY [J].
ORIHARA, S ;
KAWAKAMI, S ;
SAKAI, S .
IEEE TRANSACTIONS ON MAGNETICS, 1973, MAG9 (03) :507-511