A CHARGE-BASED LARGE-SIGNAL BIPOLAR-TRANSISTOR MODEL FOR DEVICE AND CIRCUIT SIMULATION

被引：22

作者：

JEONG, HG

FOSSUM, JG

机构：

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 1989年 / 36卷 / 01期

关键词：

D O I：

10.1109/16.21191

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：124 / 131

页数：8

共 16 条

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[2] PARTITIONED-CHARGE-BASED MODELING OF BIPOLAR-TRANSISTORS FOR NON-QUASI-STATIC CIRCUIT SIMULATION [J].

FOSSUM, JG ;

VEERARAGHAVAN, S .

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[3]

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[4]

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[5]

GETREU IE, 1978, MODELING BIPOLAR TRA

[6]

HWANG BY, 1987, SEP IEEE BIP CIRC TE

[7]

JEONG H, 1988, SEP IEEE BIP CIRC TE

[8]

JEONG HG, 1987, IEEE T ELECTRON DEV, V34, P898, DOI 10.1109/T-ED.1987.23013

[9]

KNEPPER RW, 1987, SEP IEEE BIP CIRC TE

[10] A UNIFIED CIRCUIT MODEL FOR BIPOLAR-TRANSISTORS INCLUDING QUASI-SATURATION EFFECTS [J].

KULL, GM ;

NAGEL, LW ;

LEE, SW ;

LLOYD, P ;

PRENDERGAST, EJ ;

DIRKS, H .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1985, 32 (06) :1103-1113

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