AN EFFICIENT METHODOLOGY FOR BUILDING MACROMODELS OF IC FABRICATION PROCESSES

被引:40
作者
LOW, KK [1 ]
DIRECTOR, SW [1 ]
机构
[1] CARNEGIE MELLON UNIV,DEPT ELECT & COMP ENGN,PITTSBURGH,PA 15213
关键词
D O I
10.1109/43.44510
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
引用
收藏
页码:1299 / 1313
页数:15
相关论文
共 18 条
[1]   APPLICATION OF STATISTICAL DESIGN AND RESPONSE-SURFACE METHODS TO COMPUTER-AIDED VLSI DEVICE DESIGN [J].
ALVAREZ, AR ;
ABDI, BL ;
YOUNG, DL ;
WEED, HD ;
TEPLIK, J ;
HERALD, ER .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1988, 7 (02) :272-288
[2]   A NEW DESIGN-CENTERING METHODOLOGY FOR VLSI DEVICE DEVELOPMENT [J].
AOKI, Y ;
MASUDA, H ;
SHIMADA, S ;
SATO, S .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1987, 6 (03) :452-461
[3]   2K-P FRACTIONAL FACTORIAL DESIGNS .1. [J].
BOX, GE ;
HUNTER, JS .
TECHNOMETRICS, 1961, 3 (03) :311-&
[4]  
Box George., 1987, EMPIRICAL MODEL BUIL
[5]   2K-P FRACTIONAL FACTORIAL DESIGNS .2. [J].
BOX, GEP ;
HUNTER, JS .
TECHNOMETRICS, 1961, 3 (04) :449-&
[6]  
BOX GEP, 1978, STATISTICS EXPT
[7]  
Burden RL., 1985, NUMERICAL ANAL
[8]   STATISTICAL MODELING FOR EFFICIENT PARAMETRIC YIELD ESTIMATION OF MOS VLSI CIRCUITS [J].
COX, P ;
YANG, P ;
MAHANTSHETTI, SS ;
CHATTERJEE, P .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1985, 32 (02) :471-478
[9]  
DEGROOT MH, 1986, PROBABILITY STATISTI
[10]   CONSTRUCTION OF SATURATED 2R K-P DESIGNS [J].
DRAPER, NR ;
MITCHELL, TJ .
ANNALS OF MATHEMATICAL STATISTICS, 1967, 38 (04) :1110-&