MOSFET TEST STRUCTURES FOR 2-DIMENSIONAL DEVICE SIMULATION

被引：69
作者：
SAHA, S
机构：
[1] Technology CAD, National Semiconductor Corporation, Santa Clara, CA 95052-8090
来源：
SOLID-STATE ELECTRONICS | 1995年 / 38卷 / 01期
关键词：
D O I：
10.1016/0038-1101(94)E0050-O
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper describes a quantitative methodology for the selection of simulation space and the generation of MOSFET mesh for two-dimensional device simulation. Simple mathematical expressions for the selection of two-dimensional device geometries are presented. A set of grid specifications was generated for simulation accuracy and computational efficiency of a device simulation program. These grid specifications were used in conjunction with the grid generation algorithm in the device simulation program MEDICI to generate two-dimensional nMOSFET test structures of different channel lengths. A methodology to verify the robustness of the test structures is also described.
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页码：69 / 73
页数：5
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