THERMAL RESISTANCE OF PLANAR SEMICONDUCTOR STRUCTURES

被引:2
|
作者
HARTNAGEL, H
HUTSON, VC
机构
关键词
D O I
10.1049/piee.1972.0140
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:655 / +
页数:1
相关论文
共 50 条
  • [21] Multiplication of photocurrent in silicon planar metal-semiconductor-metal structures
    Khunkhao, S.
    Titiroongruang, W.
    Niemcharoen, S.
    Ruangphanit, A.
    Phongphanchanthra, N.
    Sato, Kazunori
    ECTI-CON: 2009 6TH INTERNATIONAL CONFERENCE ON ELECTRICAL ENGINEERING/ELECTRONICS, COMPUTER, TELECOMMUNICATIONS AND INFORMATION TECHNOLOGY, VOLS 1 AND 2, 2009, : 417 - +
  • [22] Semiconductor-Gas-Discharge Planar Structures as Devices for Unconventional Computing
    Astrov, Yu. A.
    INTERNATIONAL JOURNAL OF UNCONVENTIONAL COMPUTING, 2010, 6 (01) : 33 - 73
  • [23] Thermal properties of semiconductor low-dimensional structures
    Balandin, A
    PHYSICS OF LOW-DIMENSIONAL STRUCTURES, 2000, 1-2 : 1 - 28
  • [24] Metastable thermal states in semiconductor double barrier structures
    Kozlowski, M
    Marciak-Kozlowska, J
    Mucha, Z
    ULTRAFAST PHENOMENA IN SEMICONDUCTORS, 1999, 297-2 : 217 - 220
  • [25] Planar Hall Resistance Sensor With Improved Thermal Stability
    Jeon, Taehyeong
    Lee, Jae Hoon
    Talantsev, Artem
    Kim, Cheol Gi
    IEEE MAGNETICS LETTERS, 2019, 10
  • [26] A planar micro thermoelectric generator with high thermal resistance
    Yuan, Zheng
    Ziouche, Katir
    Bougrioua, Zahia
    Lejeune, Pascale
    Lasri, Tuami
    Leclercq, Didier
    SENSORS AND ACTUATORS A-PHYSICAL, 2015, 221 : 67 - 76
  • [27] Research on Package Thermal Resistance of Power Semiconductor Devices
    Nishi, Koji
    2019 35TH SEMICONDUCTOR THERMAL MEASUREMENT, MODELING AND MANAGEMENT SYMPOSIUM (SEMI-THERM), 2019, : 61 - 65
  • [28] Fast Determination of the Thermal Resistance of Semiconductor Devices.
    Poehlmann, Bernd
    Elektronik Munchen, 1980, 29 (22): : 125 - 127
  • [29] MEASURING THERMAL-RESISTANCE IS KEY TO A COOL SEMICONDUCTOR
    SIEGEL, BS
    ELECTRONICS, 1978, 51 (14): : 121 - 126
  • [30] SEMICONDUCTOR MEASUREMENT TECHNOLOGY: PLANAR TEST STRUCTURES FOR CHARACTERIZING IMPURITIES IN SILICON.
    Buehler, M.G.
    David, J.M.
    Mattis, R.L.
    Phillips, W.E.
    Thurber, W.R.
    National Bureau of Standards, Special Publication, 1976, (400-21):