AN UNDERGRADUATE VLSI CMOS CIRCUIT-DESIGN LABORATORY

被引:5
|
作者
WILLIAMS, RW
机构
[1] Department of Computer Science, University of Vermont, Burlington
关键词
D O I
10.1109/13.79880
中图分类号
G40 [教育学];
学科分类号
040101 ; 120403 ;
摘要
This paper describes a structured, 13-week series of laboratory exercises which demonstrates very large scale integrated (VLSI) CMOS digital circuit design and simulation for undergraduates in electrical engineering. It also suggests cost effective measures that could make the laboratory exercises economically feasible for vocational schools, colleges, and universities.
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收藏
页码:47 / 51
页数:5
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