GENERALIZED TRACE-BACK TECHNIQUES FOR SURVIVOR MEMORY MANAGEMENT IN THE VITERBI ALGORITHM

被引:26
|
作者
CYPHER, R
SHUNG, CB
机构
[1] IBM CORP, ALMADEN RES CTR, DEPT K54-802, SAN JOSE, CA 95120 USA
[2] NATL CHIAO TUNG UNIV, DEPT ELECTR ENGN, HSINCHU 300, TAIWAN
[3] NATL CHIAO TUNG UNIV, INST ELECTR, HSINCHU 300, TAIWAN
来源
JOURNAL OF VLSI SIGNAL PROCESSING | 1993年 / 5卷 / 01期
关键词
VITERBI ALGORITHM; TRACE-BACK; SURVIVOR MEMORY; VLSI AREA REQUIREMENTS;
D O I
10.1007/BF01880274
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The trace-back technique is an effective approach for survivor memory management in the Viterbi algorithm. It is especially attractive when the number of states in the trellis is large, in which case the register exchange approach is impractical due to the area required for wiring. Previous descriptions of the trace-back technique have assumed either one or two trace-back pointers and have made specific assumptions about the speeds of those pointers. In this paper we present a general framework for implementing the trace-back technique with any number of traceback pointers and with relaxed assumptions about the speeds of the pointers. We also show that the use of additional trace-back pointers reduces the memory requirements. Two implementations of the generalized trace-back techniques based on standard RAMs and custom shift registers are presented.
引用
收藏
页码:85 / 94
页数:10
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