共 10 条
[1]
ASANO T, 1982, J DIGITAL SYST, V6, P1
[2]
Fujii T., 1985, 1985 International Symposium on Circuits and Systems. Proceedings (Cat. No.85CH2114-7), P1451
[3]
HORIKAWA H, 1985, THESIS HIROSHIMA U
[4]
KANI K, 1983, FUNDAMENTALS VLSI CA, P136
[5]
KASHIWABARA T, 1979, 1979 P INT S CIRC SY, P657
[6]
KAWANISHI H, 1976, T IECE JAPAN A, V59, P141
[8]
ONE-DIMENSIONAL LOGIC GATE ASSIGNMENT AND INTERVAL GRAPHS
[J].
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS,
1979, 26 (09)
:675-684
[10]
Wing O., 1985, 1985 International Symposium on Circuits and Systems. Proceedings (Cat. No.85CH2114-7), P199