LIMITATION OF LOW-TEMPERATURE LOW-PRESSURE CHEMICAL VAPOR-DEPOSITION OF SIO2 FOR THE INSULATION OF HIGH-DENSITY MULTILEVEL METAL VERY LARGE-SCALE INTEGRATED-CIRCUITS

被引：7
|
作者：
RILEY, PE [1 ]
KULKARNI, VD [1 ]
CASTEL, ED [1 ]
机构：
[1] NATL SEMICOND CORP,SANTA CLARA,CA 95051
来源：
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B | 1989年 / 7卷 / 02期
关键词：
D O I：
10.1116/1.584722
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：229 / 232
页数：4
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