Synthesis of Logic Units for Calculating Self-Dual Symmetric Boolean Functions

被引:0
作者
Suprun, V. P. [1 ]
Korobko, F. S. [1 ]
机构
[1] Belarusian State Univ, Pr Nezavisimosty 4, Minsk 220030, BELARUS
关键词
self-dual Boolean function; symmetric Boolean function; local code; logic circuit; logic elements; constructive complexity; operating speed; adjustment and informational inputs; adjustment table; primitive function;
D O I
10.3103/S0146411614010088
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
A problem of synthesizing logic circuits of units is considered. Here, an arbitrary self-dual symmetric Boolean function depending on three, five, or seven variables is realized in a single output. The constructive complexity of the synthesized logic circuits is determined by the number of inputs of logic elements, while the operating speed is influenced by the depth of the circuit. The logic circuits exceed the existing analogues in terms of complexity and operating speed.
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页码:17 / 24
页数:8
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