DUAL-REGULATOR DUAL-DECODING-TRIMMER DRAM VOLTAGE LIMITER FOR BURN-IN TEST

This paper presents a DRAM voltage limiter with a burn-in test mode. It features a dual-regulator dual-trimmer scheme that provides a precise stress voltage in a burn-in test while maintaining a constant limited voltage under normal operation. A regulator is used to preserve a constant difference between the internal burn-in voltage and the supply voltage. Two sets of trimmers reduce the voltage deviations of both the burn-in and normal-operation voltages within +/- 0.13 V. The proposed circuits are implemented in a 16-Mb CMOS DRAM. A burn-in voltage regulated to +/- 50 mV at an ambient temperature up to 120-degrees-C is obtained by simply elevating the supply voltage to 8 V as in the conventional burn-in procedures.