MECHANISMS OF POSITIVE GATE-BIAS STRESS-INDUCED INSTABILITIES IN CMOS TRANSISTORS

被引：5

作者：

DIMITRIJEV, S ^{[1
]}

ZUPAC, D ^{[1
]}

STOJADINOVIC, N ^{[1
]}

机构：

[1] UNIV NIS, FAC ELECTR ENGN, BEOGRADSKA 14, YU-18000 NIS, YUGOSLAVIA

来源：

MICROELECTRONICS RELIABILITY | 1987年 / 27卷 / 06期

关键词：

D O I：

10.1016/0026-2714(87)90762-1

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：1001 / 1016

页数：16

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