ELECTRON-BEAM DIRECT WRITING TECHNOLOGY FOR 64-MB DRAM LSIS

被引：16

作者：

MURAI, F ^{[1
]}

NAKAYAMA, Y ^{[1
]}

SAKAMA, I ^{[1
]}

KAGA, T ^{[1
]}

NAKAGOME, Y ^{[1
]}

KAWAMOTO, Y ^{[1
]}

OKAZAKI, S ^{[1
]}

机构：

[1] HITACHI LTD,VLSI ENGN,KODAIRA,TOKYO 187,JAPAN

来源：

JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS | 1990年 / 29卷 / 11期

关键词：

ELECTRON BEAM DIRECT WRITING; DRAM; CHARGING PROBLEM; PROXIMITY EFFECT CORRECTION; PATTERN CLASSIFICATION METHOD; SUBSIDIARY EXPOSURE METHOD;

D O I：

10.1143/JJAP.29.2590

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

This paper describes the electron beam direct writing technology for 64-Mb DRAM LSIs including a resist process for 0.3-mu-m resolution, the prevention of the charging problem by a conducting polymer, and proximity effect correction by both the pattern classification method and the subsidiary exposure method. A large amount of pattern data is processed after dividing the whole chip data into peripheral circuits and 256-kb memory mats. An experimental 64-Mb DRAM LSI is fabricated by these technologies.

引用

页码：2590 / 2595

页数：6

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