PARALLEL FUZZY INFORMATION-PROCESSING SYSTEM

被引:5
作者
KIM, YD
PARK, KH
LEEKWANG, H
机构
[1] KOREA ADV INST SCI & TECHNOL,DEPT COMP SCI,TAEJON 305701,SOUTH KOREA
[2] KOREA ADV INST SCI & TECHNOL,DEPT ELECT & ELECTR ENGN,TAEJON 305701,SOUTH KOREA
关键词
FUZZY HARDWARE; PARALLEL PROCESSING; FUZZY SET OPERATIONS; FUZZY INFERENCE; DEFUZZIFICATION CIRCUITS;
D O I
10.1016/0165-0114(94)00294-H
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
During the past decade, several specific hardwares for the fast fuzzy inference have been developed. However, most of them are dedicated to a specific inference method and thus cannot support fuzzy set operations. In this paper, we present a hardware architecture called KAFA (KAIST fuzzy accelerator) which provides various fuzzy inference methods and fuzzy set operations. The architecture has SIMD structure, which consists of two parts: a system control unit (MC: main controller) and an arithmetic unit (FPE: fuzzy processing element). The prototype of the proposed architecture was developed by using FPGA chips. Each FPE has a maximum speed of 5M FLOPS (fuzzy logic operations per second). As the KAFA contains 128 FPEs, we achieve a peak performance of 640M FLOPS. The speed of the KAFA holds promise for the development of new fuzzy application systems.
引用
收藏
页码:323 / 329
页数:7
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