EVALUATION OF A+B=K CONDITIONS WITHOUT CARRY PROPAGATION

被引：19
作者：
CORTADELLA, J
LLABERIA, JM
机构：
[1] Computer Architecture Department, Polytechnic University of Catalonia, 08071, Barcelona, Gran Capita s/n
来源：
IEEE TRANSACTIONS ON COMPUTERS | 1992年 / 41卷 / 11期
关键词：
ADDITION; CARRY PROPAGATION; COMPARISON; CONDITIONAL BRANCHES; PARALLEL ADDERS; PIPELINED ARCHITECTURES;
D O I：
10.1109/12.177318
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
The response time of parallel adders is mainly determined by the carry propagation delay. This paper deals with the evaluation of conditions of the type A + B = K. Although an addition is involved in the comparison, we show that it can be evaluated without carry propagation, thus drastically reducing the computation time. Dependencies produced by branches degrade the performance of pipelined computers. The evaluation of conditions is often one of the critical paths in the execution of branch instructions. A circuit is proposed for the fast evaluation of 4 + B = K conditions that can significantly improve processor performance.
引用
收藏
页码：1484 / 1488
页数：5
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