IDDQ SECONDARY COMPONENTS IN CMOS LOGIC-CIRCUITS PRECEDED BY DEFECTIVE STAGES AFFECTED BY ANALOG TYPE FAULTS

被引：3

作者：

RUBIO, A ^{[1
]}

FIGUERAS, J ^{[1
]}

CHAMPAC, V ^{[1
]}

RODRIGUEZ, R ^{[1
]}

SEGURA, J ^{[1
]}

机构：

[1] UNIV POLITECN CATALUNYA,DEPT ELECTRON ENGN,E-08080 BARCELONA,SPAIN

来源：

ELECTRONICS LETTERS | 1991年 / 27卷 / 18期

关键词：

LARGE-SCALE INTEGRATION; CIRCUIT THEORY; MODELING;

D O I：

10.1049/el:19911035

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Certain physical failures produce abnormal voltages at the output of the defective stages. I(ddq) testing techniques are shown to be efficient in testing for these failures. Because of the intermediate analogue output of the faulty stage, posterior fault-free stages exhibit abnormal values of I(ddq), increasing the effect of the fault. The set of stages influenced by the fault is modelled and analysed presenting characteristics of the propagation of the influence.

引用

页码：1656 / 1658

页数：3