HIGH-LEVEL SYNTHESIS UNLOCKS POTENTIAL OF FPGAS

被引:0
作者
TUCK, B
机构
来源
COMPUTER DESIGN | 1991年 / 30卷 / 07期
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
引用
收藏
页码:50 / &
相关论文
共 50 条
  • [21] Register Allocation for High-Level Synthesis of Hardware Accelerators Targeting FPGAs
    Hempel, Gerald
    Hoyer, Jan
    Pionteck, Thilo
    Hochberger, Christian
    2013 8TH INTERNATIONAL WORKSHOP ON RECONFIGURABLE AND COMMUNICATION-CENTRIC SYSTEMS-ON-CHIP (RECOSOC), 2013,
  • [22] Efficient and Reliable High-Level Synthesis Design Space Explorer for FPGAs
    Liu, Dong
    Schafer, Benjamin Carrion
    2016 26TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL), 2016,
  • [23] A Parametrizable High-Level Synthesis Library for Accelerating Neural Networks on FPGAs
    Lester Kalms
    Pedram Amini Rad
    Muhammad Ali
    Arsany Iskander
    Diana Göhringer
    Journal of Signal Processing Systems, 2021, 93 : 513 - 529
  • [24] High-Level Synthesis of Resource-oriented Approximate Designs for FPGAs
    Leipnitz, Marcos T.
    Nazar, Gabriel L.
    PROCEEDINGS OF THE 2019 56TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2019,
  • [25] High-Level Synthesis for FPGAs-A Hardware Engineer's Perspective
    Lahti, Sakari
    Hamalainen, Timo D.
    IEEE ACCESS, 2025, 13 : 28574 - 28593
  • [26] High-level power modeling of CPLDs and FPGAs
    Shang, L
    Jha, NK
    2001 INTERNATIONAL CONFERENCE ON COMPUTER DESIGN, ICCD 2001, PROCEEDINGS, 2001, : 46 - 51
  • [27] Performance Modeling for FPGAs: Extending the Roofline Model with High-Level Synthesis Tools
    da Silva, Bruno
    Braeken, An
    D'Hollander, Erik H.
    Touhafi, Abdellah
    INTERNATIONAL JOURNAL OF RECONFIGURABLE COMPUTING, 2013, 2013
  • [28] High-Level Synthesis-Based Approach for Accelerating Scientific Codes on FPGAs
    Venkatakrishnan, Ramshankar
    Misra, Ashish
    Kindratenko, Volodymyr
    COMPUTING IN SCIENCE & ENGINEERING, 2020, 22 (04) : 104 - 108
  • [29] GRASP-based High-Level Synthesis Design Space Exploration for FPGAs
    Schuster, Nikolas P.
    Nazar, Gabriel L.
    2023 XIII BRAZILIAN SYMPOSIUM ON COMPUTING SYSTEMS ENGINEERING, SBESC, 2023,
  • [30] Fortran High-Level Synthesis: Reducing the barriers to accelerating HPC codes on FPGAs
    Rodriguez-Canal, Gabriel
    Brown, Nick
    Dykes, Tim
    Jones, Jess
    Haus, Utz-Uwe
    2023 33RD INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, FPL, 2023, : 10 - 18