A CMOS SERIAL LINK FOR FULLY DUPLEXED DATA COMMUNICATION

被引:49
作者
LEE, K
KIM, S
AHN, G
JEONG, DK
机构
[1] Inter-University Semiconductor Research Center, Seoul National University
关键词
D O I
10.1109/4.375953
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes a CMOS serial link allowing fully duplexed 500 Mbaud serial data communication, The CMOS serial link is a robust and low-cost solution to high data rate requirements, A central charge pump PLL for generating multiphase clocks for oversampling is shared by several serial link channels, Fully duplexed serial data communication is realized in the bidirectional bridge by separating incoming data from the mixed signal on the cable end, The digital PLL accomplishes process-independent data: recovery by using a low-ratio oversampling, a majority voting, and a parallel data recovery scheme;. Mostly, digital approach could extend its bandwidth further with scaled CMOS technology, A single channel serial link and a charge pump PLL are integrated in a test chip using 1.2 mu m CMOS process technology, The test chip confirms upto 500 Mbaud unidirectional mode operation and 320 Mbaud fully duplexed mode operation with pseudo random data patterns.
引用
收藏
页码:353 / 364
页数:12
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