SCALABILITY PROBLEMS IN MULTIPROCESSORS WITH PRIVATE CACHES

被引:0
|
作者
DUBOIS, M
BARROSO, L
CHEN, YS
ONER, K
机构
关键词
D O I
暂无
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
This paper addresses the performance problems caused by high memory access latencies and their effect on the scalability of shared-memory multiprocessor systems. We propose to take full advantage of weak ordering through lock-up-free caches and delayed consistency protocols and to interconnect processors with point-to-point links. Simulation results show that these approaches are promising.
引用
收藏
页码:211 / 230
页数:20
相关论文
共 50 条
  • [1] An operational model for multiprocessors with caches
    Joshi S.
    Prasad S.
    IFIP Advances in Information and Communication Technology, 2010, 323 AICT : 371 - 385
  • [2] An Operational Model for Multiprocessors with Caches
    Joshi, Salil
    Prasad, Sanjiva
    THEORETICAL COMPUTER SCIENCE, 2010, 323 : 371 - 385
  • [3] On the scalability of LISP mappings caches
    Coras, Florin
    Domingo-Pascual, Jordi
    Cabellos-Aparicio, Albert
    COMPUTER NETWORKS, 2015, 91 : 174 - 183
  • [4] Reusability-aware cache memory sharing for chip multiprocessors with private L2 caches
    Kim, Hyunhee
    Youn, Sungjun
    Kim, Jihong
    JOURNAL OF SYSTEMS ARCHITECTURE, 2009, 55 (10-12) : 446 - 456
  • [5] An educational tool for testing caches on symmetric multiprocessors
    Rodríguez, MAV
    Pérez, JMS
    Pulido, JAG
    MICROPROCESSORS AND MICROSYSTEMS, 2001, 25 (04) : 187 - 194
  • [6] Exploring Hybrid Memory Caches in Chip Multiprocessors
    Donyanavard, Bryan
    Monazzah, Amir Mandi Hosseini
    Muck, Tiago
    Dutt, Nikil
    PROCEEDINGS OF THE 2018 13TH INTERNATIONAL SYMPOSIUM ON RECONFIGURABLE COMMUNICATION-CENTRIC SYSTEMS-ON-CHIP (RECOSOC), 2018,
  • [7] Coded Caching with Shared Caches and Private Caches
    Peter, Elizabath
    Namboodiri, K. K. Krishnan
    Rajan, B. Sundar
    2023 IEEE INFORMATION THEORY WORKSHOP, ITW, 2023, : 119 - 124
  • [8] Coded Caching With Shared Caches and Private Caches
    Peter, Elizabath
    Namboodiri, K. K. Krishnan
    Rajan, B. Sundar
    IEEE TRANSACTIONS ON COMMUNICATIONS, 2024, 72 (08) : 4857 - 4872
  • [9] Virtual Private Caches
    Nesbit, Kyle J.
    Laudon, James
    Smith, James E.
    ISCA'07: 34TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE, CONFERENCE PROCEEDINGS, 2007, : 57 - 68
  • [10] SOLUTIONS AND DEBUGGING FOR DATA CONSISTENCY IN MULTIPROCESSORS WITH NONCOHERENT CACHES
    BERNSTEIN, D
    BRETERNITZ, M
    GHEITH, AM
    MENDELSON, B
    INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING, 1995, 23 (01) : 83 - 103