HIGH-SPEED DESIGN SCHEME FOR MASK ROM

被引：0

作者：

HOTTA, Y

MATSUYAMA, R

YOSHII, M

OKADA, M

TSUGITA, H

SANO, K

机构：

来源：

SHARP TECHNICAL JOURNAL | 1991年 / 49期

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Circuit technologies are described, which realize high speed mask ROMs. The technologies are as follows: 1) A new world-line drive architecture with a smaller cell size which is suitable for mask ROMs. 2) A new, high speed sensing scheme utilizing a low boron implant and a fully differential sense amplifier. 3) A low noise output buffer which can achieve high speed and reduce peak current noise. We have developed a high speed 1Mb (128k x 8) CMOS mask ROM utilizing these technologies together with 1.0-mu-m CMOS technology, and achieved an access time of 26ns.

引用

页码：41 / 44

页数：4

共 50 条

[41] A system analysis for high- and very high-speed CD-ROM drives [J].

Stan, SG ;

Akkermans, THM ;

Steinbuch, M ;

Norg, ML .

MOTION CONTROL (MC'98), 1999, :225-230

[42] Research on the Design Scheme of Routine Conductive High-Speed Maglev Integrated Grounding System [J].

Li, Guosheng ;

Su, Di ;

Chen, Ruichao .

PROCEEDINGS OF THE 6TH INTERNATIONAL CONFERENCE ON ELECTRICAL ENGINEERING AND INFORMATION TECHNOLOGIES FOR RAIL TRANSPORTATION, EITRT 2023: ENERGY TRACTION TECHNOLOGY OF RAIL TRANSPORTATION, 2024, 1135 :379-386

[43] A simple high-speed multiplier design [J].

Kang, Jung-Yup ;

Gaudiot, Jean-Luc .

IEEE TRANSACTIONS ON COMPUTERS, 2006, 55 (10) :1253-1258

[44] AEROTHERMODYNAMIC DESIGN OF HIGH-SPEED ROCKETS [J].

MCALEES, S ;

MAYDEW, RC .

JOURNAL OF SPACECRAFT AND ROCKETS, 1985, 22 (03) :309-315

[45] Design of a high-speed square generator [J].

Wey, CL ;

Shieh, MD .

IEEE TRANSACTIONS ON COMPUTERS, 1998, 47 (09) :1021-1026

[46] Aerodynamic design on high-speed trains [J].

SanSan Ding ;

Qiang Li ;

AiQin Tian ;

Jian Du ;

JiaLi Liu .

Acta Mechanica Sinica, 2016, 32 (02) :215-232

[47] HEADBOX DESIGN DEVELOPMENT, HIGH-SPEED AND SLOW SPEED [J].

WAHLSTROM, B .

1989 WET END OPERATIONS SEMINAR, 1989, :65-82

[48] High-speed domino logic design [J].

Sahari, S. K. ;

Tiong, Colina P. ;

Rajaee, N. ;

Sapawi, R. .

APACE: 2005 ASIA-PACIFIC CONFERENCE ON APPLIED ELECTROMAGNETICS, PROCEEDINGS, 2005, :280-283

[49] Design of High-Speed Wireline Transceivers [J].

Lee, Jri .

2011 IEEE INTERNATIONAL SOC CONFERENCE (SOCC), 2011, :353-353

[50] Design and analysis of a high-speed comparator [J].

Jun, Gu ;

Yong, Lian ;

Bo, Shi .

2005 IEEE INTERNATIONAL WORKSHOP ON RADIO-FREQUENCY INTEGRATION TECHNOLOGY, PROCEEDINGS: INTEGRATED CIRCUITS FOR WIDEBAND COMMUNICATION AND WIRELESS SENSOR NETWORKS, 2005, :215-218

← 1 2 3 4 5 →