HIGH-SPEED DESIGN SCHEME FOR MASK ROM

被引：0
|
作者：
HOTTA, Y
MATSUYAMA, R
YOSHII, M
OKADA, M
TSUGITA, H
SANO, K
机构：
来源：
SHARP TECHNICAL JOURNAL | 1991年 / 49期
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Circuit technologies are described, which realize high speed mask ROMs. The technologies are as follows: 1) A new world-line drive architecture with a smaller cell size which is suitable for mask ROMs. 2) A new, high speed sensing scheme utilizing a low boron implant and a fully differential sense amplifier. 3) A low noise output buffer which can achieve high speed and reduce peak current noise. We have developed a high speed 1Mb (128k x 8) CMOS mask ROM utilizing these technologies together with 1.0-mu-m CMOS technology, and achieved an access time of 26ns.
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页码：41 / 44
页数：4
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