A FINE-GRAIN ARCHITECTURE FOR RELATIONAL DATABASE AGGREGATION OPERATIONS

This design and simulation of a bit-sliced processor for relational database aggregation functions addresses an important, computationally expensive problem in database computers. The slice processor takes two tuples as inputs (one bit at a time) and returns two bits as outputs every clock cycle. A larger aggregation unit uses a number of identical slice processors, connected according to odd-even network topology, to achieve improved performance on a parallel pipelined processor.