AN ADVANCED SINGLE-LEVEL POLYSILICON SUBMICROMETER BICMOS TECHNOLOGY

被引：11

作者：

BRASSINGTON, MP ^{[1
]}

ELDIWANY, MH ^{[1
]}

RAZOUK, RR ^{[1
]}

THOMAS, ME ^{[1
]}

TUNTASOOD, PT ^{[1
]}

机构：

[1] NATL SEMICOND CORP,FAIRCHILD RES CTR,SANTA CLARA,CA 95052

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 1989年 / 36卷 / 04期

关键词：

D O I：

10.1109/16.22476

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：712 / 719

页数：8

共 14 条

[1]

Alvarez A. R., 1984, International Electron Devices Meeting. Technical Digest (Cat. No. 84CH2099-0), P761

[2]

BASTANI B, 1987, P S VLSI TECH, P41

[3] SUPPRESSION OF HOT-CARRIER EFFECTS IN SUBMICROMETER SURFACE-CHANNEL PMOSFETS [J].

BRASSINGTON, MP ;

POULTER, MW ;

ELDIWANY, M .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1988, 35 (07) :1149-1151

[4] THE RELATIONSHIP BETWEEN GATE BIAS AND HOT-CARRIER-INDUCED INSTABILITIES IN BURIED-CHANNEL AND SURFACE-CHANNEL PMOSFETS [J].

BRASSINGTON, MP ;

RAZOUK, RR .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1988, 35 (03) :320-324

[5]

CHIU TY, 1987, IEDM, P24

[6] USE OF THE POLYSILICON GATE LAYER FOR LOCAL INTERCONNECT IN A CMOS TECHNOLOGY INCORPORATING LDD STRUCTURES [J].

ELDIWANY, MH ;

BRASSINGTON, MP ;

TUNTASOOD, P ;

RAZOUK, RR ;

POULTER, MW .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1988, 35 (09) :1556-1558

[7] INCREASED CURRENT GAIN AND SUPPRESSION OF PERIPHERAL BASE CURRENTS IN SILICIDED SELF-ALIGNED NARROW-WIDTH POLYSILICON-EMITTER TRANSISTORS OF AN ADVANCED BICMOS TECHNOLOGY [J].

ELDIWANY, MH ;

BRASSINGTON, MP ;

TUNTASOOD, P .

IEEE ELECTRON DEVICE LETTERS, 1988, 9 (05) :247-249

[8]

HOSHI N, 1986, IEDM TECH DIG, P330

[9]

HU C, 1985, IEEE T ELECTRON DEV, V32, P584, DOI DOI 10.1109/T-ED.1985.21981

[10] HIGH-SPEED BICMOS TECHNOLOGY WITH A BURIED TWIN WELL STRUCTURE [J].

IKEDA, T ;

WATANABE, A ;

NISHIO, Y ;

MASUDA, I ;

TAMBA, N ;

ODAKA, M ;

OGIUE, K .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1987, 34 (06) :1304-1310

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