A CMOS 4-QUADRANT ANALOG MULTIPLIER WITH SINGLE-ENDED VOLTAGE OUTPUT AND IMPROVED TEMPERATURE PERFORMANCE

被引：77
作者：
WANG, ZH
机构：
[1] Institute of Electronics, Department of Electrical Engineering, Swiss Federal Institute of Technology
来源：
IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1991年 / 26卷 / 09期
关键词：
Computers; Microcomputer - Multiplying Circuits - Integrated Circuits; Linear - Microprocessor Chips;
D O I：
10.1109/4.84947
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
An all-MOS, four-quadrant, analog multiplier with single-ended voltage output and good temperature performance is presented. It is based on a linear MOS transconductor with extended operation range to four quadrants and on a linear MOS resistor. The temperature behavior of the multiplier is improved by a factor of 10. The multiplier has been realized using a 3-mu-m p-well SACMOS process. A linearity better than 1% for each of the input voltages of 5 V(p-p), a bandwidth from dc to 1.2 MHz, and output noise 73 dB below full scale are achieved. The active chip area is 210 mil2 and power consumption is 6 mW. A new approach for implementing a temperature-independent analog multiplier is proposed.
引用
收藏
页码：1293 / 1301
页数：9
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