REALIZATION OF A DPCM CODER FOR 13.5-MHZ SAMPLING RATE IN CMOS TECHNOLOGY
被引:4
作者:
ROTHERMEL, A
论文数: 0引用数: 0
h-index: 0
机构:Fraunhofer Inst for Microelectronic, Circuits & Systems, Duisburg,, West Ger, Fraunhofer Inst for Microelectronic Circuits & Systems, Duisburg, West Ger
ROTHERMEL, A
机构:
[1] Fraunhofer Inst for Microelectronic, Circuits & Systems, Duisburg,, West Ger, Fraunhofer Inst for Microelectronic Circuits & Systems, Duisburg, West Ger
INTEGRATED CIRCUITS;
DIGITAL - Fabrication - PULSE CODE MODULATION;
D O I:
10.1109/JSSC.1987.1052873
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
A DPCM (digital pulse-code modulation) coder integrated in a 2- mu m CMOS technology is discussed. The motivation was to introduce low-cost coders for video signals compatible with the planned European ISDN. Due to the internal feedback loop, the main problem was to achieve the required operating speed of 13. 5-MHz sampling rate. Measurements of fabricated samples proved that the expected performance was achieved.