A FAST MULTIPLIERLESS ARCHITECTURE FOR GENERAL-PURPOSE VLSI FIR DIGITAL-FILTERS

被引：1

作者：

SHAH, IA

BHATTACHARYA, AK

机构：

来源：

关键词：

D O I：

10.1109/TCE.1987.290251

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：129 / 135

页数：7

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