PARALLEL ARCHITECTURES AND MENTAL COMPUTATION

被引:1
作者
WELLS, A
机构
关键词
D O I
10.1093/bjps/44.3.531
中图分类号
N09 [自然科学史]; B [哲学、宗教];
学科分类号
01 ; 0101 ; 010108 ; 060207 ; 060305 ; 0712 ;
摘要
In a recent paper, Lyngzeidetson [1990] has claimed that a type of parallel computer called the 'Connection Machine' instantiates architectural principles which will 'revolutionize which ''functions'' of the human mind can and cannot be modelled by (non-human) computational automata. In particular, he claims that the Connection Machine architecture shows the anti-mechanist argument from Godel's theorem to be false for at least one kind of parallel computer. In the first part of this paper, I argue that Lyngzeidetson's claims are not supported by his arguments; in the second part I consider some other aspects of parallel computation which may be of theoretical significance in cognitive science.
引用
收藏
页码:531 / 542
页数:12
相关论文
共 50 条
  • [1] Parallel Skyline Computation on Multicore Architectures
    Park, Sungwoo
    Kim, Taekyung
    Park, Jonghyun
    Kim, Jinha
    Im, Hyeonseung
    [J]. ICDE: 2009 IEEE 25TH INTERNATIONAL CONFERENCE ON DATA ENGINEERING, VOLS 1-3, 2009, : 760 - 771
  • [2] Parallel skyline computation on multicore architectures
    Im, Hyeonseung
    Park, Jonghyun
    Park, Sungwoo
    [J]. INFORMATION SYSTEMS, 2011, 36 (04) : 808 - 823
  • [3] MODULAR HIGHLY-PARALLEL COMPUTATION AND ARCHITECTURES
    KOTOV, VE
    [J]. LECTURE NOTES IN COMPUTER SCIENCE, 1989, 342 : 147 - 155
  • [4] Computation of dendrites on parallel distributed memory architectures
    Andersson, C
    [J]. SIMULATION AND VISUALIZATION ON THE GRID, PROCEEDINGS, 2000, 13 : 195 - +
  • [5] EFFICIENT PARALLEL ALGORITHMS AND VLSI ARCHITECTURES FOR MANIPULATOR JACOBIAN COMPUTATION
    YEUNG, TB
    LEE, CSG
    [J]. IEEE TRANSACTIONS ON SYSTEMS MAN AND CYBERNETICS, 1989, 19 (05): : 1154 - 1166
  • [6] Systematic synthesis of parallel architectures for the computation of higher order cumulants
    Manolakos, ES
    Stellakis, HM
    [J]. PARALLEL COMPUTING, 2000, 26 (05) : 655 - 676
  • [7] On the Development of Variable Size Batched Computation for Heterogeneous Parallel Architectures
    Abdelfattah, Ahmad
    Haidar, Azzam
    Tomov, Stanimire
    Dongarra, Jack
    [J]. 2016 IEEE 30TH INTERNATIONAL PARALLEL AND DISTRIBUTED PROCESSING SYMPOSIUM WORKSHOPS (IPDPSW), 2016, : 1249 - 1258
  • [8] Massively Parallel Skyline Computation For Processing-In-Memory Architectures
    Zois, Vasileios
    Gupta, Divya
    Tsotras, Vassilis J.
    Najjar, Walid A.
    Roy, Jean-Francois
    [J]. 27TH INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES (PACT 2018), 2018,
  • [9] PARALLEL COMPUTATION OF SYMBOLIC ROBOT MODELS OF PIPELINED PROCESSOR ARCHITECTURES
    KIRCANSKI, N
    PETROVIC, T
    VUKOBRATOVIC, M
    [J]. ROBOTICA, 1993, 11 : 37 - 47
  • [10] Variable grain architectures for MPP computation and structured parallel programming
    Vanneschi, M
    [J]. THIRD WORKING CONFERENCE ON MASSIVELY PARALLEL PROGRAMMING MODELS, PROCEEDINGS, 1998, : 132 - 139