A 0.7-7 GHz wideband reconfigurable receiver RF front-end in CMOS

被引:0
作者
Zhang, Youming [1 ]
Yang, Lijuan [1 ]
Huang, Fengyi [1 ,2 ]
Jiang, Nan [2 ]
Zhang, Xuegang [1 ]
机构
[1] Southeast Univ, Sch Informat Sci & Engn, Inst RF & OE ICs, Nanjing 210096, Jiangsu, Peoples R China
[2] S TEK Shanghai High Frequency Commun Technol Co L, Shanghai 201203, Peoples R China
关键词
wideband LNA; resistive-feedback; CMOS; passive mixer;
D O I
10.1088/1674-4926/39/8/085003
中图分类号
O469 [凝聚态物理学];
学科分类号
070205 ;
摘要
A 0.7-7 GHz wideband RF receiver front-end SoC is designed using the CMOS process. The front-end is composed of two main blocks: a single-ended wideband low noise amplifier (LNA) and an in-phase/quadrature (I/Q) voltage-driven passive mixer with IF amplifiers. Based on a self-biased resistive negative feedback topology, the LNA adopts shunt-peaking inductors and a gate inductor to boost the bandwidth. The passive down-conversion mixer includes two parts: passive switches and IF amplifiers. The measurement results show that the front-end works well at different LO frequencies, and this chip is reconfigurable among 0.7 to 7 GHz by tuning the LO frequency. The measured results under 2.5-GHz LO frequency show that the front-end SoC achieves a maximum conversion gain of 26 dB, a minimum noise figure (NF) of 3.2 dB, with an IF bandwidth of greater than 500 MHz. The chip area is 1.67 x 1.08 mm(2).
引用
收藏
页数:4
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