3-DIMENSIONAL SIMULATION OF LOW-TEMPERATURE OPERATION MOSFETS

Low-temperature MOSFET is a promising device for future high-speed VLSI. We have developed a three-dimensional device simulator which can be used for the analysis of low-temperature deep-submicron MOSFET's. In order to improve the convergence property, the method of physical limiting on increment (PLI) was suggested. Two types of PLI, i.e., the limiting on potential increment (LPI) and the limiting on carrier-concentration increment (LCI) were showed to be very simple and effective methods for both 300 K and 77 K. Using the simulated results of COLD3, we showed the threshold variation in a low-temperature MOSFET due to the narrow channel effect can be suppressed if the device is designed according to the temperature scaling law.