NAND MODEL FOR FAULT DIAGNOSIS IN COMBINATIONAL LOGIC NETWORKS

被引：45

作者：

HAYES, JP

机构：

来源：

关键词：

D O I：

10.1109/T-C.1971.223162

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

引用

页码：1496 / +

页数：1

共 13 条

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[2] CHANG HY, 1970, FAULT DIAGNOSIS DIGI
[3] AN ALGORITHM FOR NAND DECOMPOSITION UNDER NETWORK CONSTRAINTS
DAVIDSON, ES
[J]. IEEE TRANSACTIONS ON COMPUTERS, 1969, C 18 (12) : 1098 - &
[4] DIEPHUIS RJ, 1969, THESIS MASS I TECH
[5] FAULT DETECTION IN REDUNDANT CIRCUITS
FRIEDMAN, AD
[J]. IEEE TRANSACTIONS ON ELECTRONIC COMPUTERS, 1967, EC16 (01): : 99 - +
[6] GAULT JW, 1969, 13 U IOW THEM PROJ T
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