NEW INTEGRATED ACOUSTOOPTIC MATRIX ALGEBRA PROCESSOR ARCHITECTURE

被引:3
|
作者
KARROY, A [1 ]
TSAI, CS [1 ]
机构
[1] UNIV CALIF IRVINE,INST SURFACE & INTERFACE SCI,IRVINE,CA 92717
关键词
D O I
10.1063/1.105799
中图分类号
O59 [应用物理学];
学科分类号
摘要
A new integrated optic matrix algebra processor architecture that utilizes guided-wave multifrequency acousto-optic (AO) Bragg diffractions is proposed. The architecture is potentially capable of performing matrix-vector multiplications faster than any AO architecture reported heretofore, and matrix-matrix multiplications at rates comparable to the fastest bulk-wave AO architecture. An integrated AO processor module has been realized in a Y-cut LiNbO3 substrate 1.0 x 10.0 x 28.0 mm3 in size to demonstrate the multiplication of a 4X4 matrix with a 4-element vector at the optical wavelength of 0.6328-mu-m.
引用
收藏
页码:3093 / 3095
页数:3
相关论文
共 50 条
  • [21] ACOUSTOOPTIC CCD IMAGE-PROCESSOR
    PSALTIS, D
    PAEK, EG
    VENKATESH, S
    PROCEEDINGS OF THE SOCIETY OF PHOTO-OPTICAL INSTRUMENTATION ENGINEERS, 1984, 422 : 204 - 208
  • [22] ACOUSTOOPTIC PROCESSOR IMPROVES RADAR WARNING
    ENGLER, H
    PHOTONICS SPECTRA, 1992, 26 (08) : 88 - 88
  • [23] Mathematical modeling of a measuring acoustooptic processor
    Parshutkin, AV
    Shcherbak, VI
    RADIOTEKHNIKA I ELEKTRONIKA, 1996, 41 (10): : 1225 - 1228
  • [24] Mathematical modeling of the measuring acoustooptic processor
    J Commun Technol Electron, 13 (1142-1145):
  • [25] ACOUSTOOPTIC MATRIX MATRIX MULTIPLIER
    KALIVAS, DS
    ALBANESE, G
    SAWCHUK, AA
    OPTICS LETTERS, 1988, 13 (04) : 291 - 293
  • [26] A Unified Co-Processor Architecture for Matrix Decomposition
    窦勇
    周杰
    邬贵明
    姜晶菲
    雷元武
    倪时策
    JournalofComputerScience&Technology, 2010, 25 (04) : 874 - 885
  • [27] A Unified Co-Processor Architecture for Matrix Decomposition
    Yong Dou
    Jie Zhou
    Gui-Ming Wu
    Jing-Fei Jiang
    Yuan-Wu Lei
    Shi-Ce Ni
    Journal of Computer Science and Technology, 2010, 25 : 874 - 885
  • [28] A Unified Co-Processor Architecture for Matrix Decomposition
    Dou, Yong
    Zhou, Jie
    Wu, Gui-Ming
    Jiang, Jing-Fei
    Lei, Yuan-Wu
    Ni, Shi-Ce
    JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2010, 25 (04) : 874 - 885
  • [30] New Generation Processor Architecture Research
    陈红松
    High Technology Letters, 2003, (04) : 94 - 96