BERGER CHECK PREDICTION FOR ARRAY MULTIPLIERS AND ARRAY DIVIDERS

被引：12

作者：

LO, JC ^{[1
]}

THANAWASTIEN, S ^{[1
]}

RAO, TRN ^{[1
]}

机构：

[1] UNIV SW LOUISIANA,CTR ADV COMP STUDIES,LAFAYETTE,LA 70504

来源：

IEEE TRANSACTIONS ON COMPUTERS | 1993年 / 42卷 / 07期

基金：

美国国家科学基金会;

关键词：

ARRAY MULTIPLIERS; BERGER CHECK PREDICTION; COMPUTER ARITHMETIC; CONCURRENT ERROR DETECTION; NONRESTORING ARRAY DIVIDERS;

D O I：

10.1109/12.237731

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this correspondence, we present close form check predicting equations to derive Berger checks for array multipliers and array divideers, respectively. Braun's array multipliers and Guild's array dividers are examined. Example check circuits are also presented.

引用

页码：892 / 896

页数：5

共 8 条

[1]

BERGER J, 1961, INFORM CONTR, P68

[2]

FURUYA K, 1983, 13TH P S FAULT TOL C, P306

[3]

HWANG K, 1979, COMPUTER ARITHMETIC

[4] AN SFS BERGER CHECK PREDICTION ALU AND ITS APPLICATION TO SELF-CHECKING PROCESSOR DESIGNS [J].

LO, JC ;

THANAWASTIEN, S ;

RAO, TRN ;

NICOLAIDIS, M .

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1992, 11 (04) :525-540

[5]

LO JC, 1989, 9TH P S COMP ARITH, P233

[6]

MAROUF MA, 1978, 8TH P S FAULT TOL CO, P179

[7]

Rao T. R, 1989, ERROR CONTROL CODING

[8]

SELLERS FF, 1968, ERROR ETECTING LOGIC

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