A HIGHER-ORDER TOPOLOGY FOR INTERPOLATIVE MODULATORS FOR OVERSAMPLING A/D CONVERTERS

被引:177
作者
CHAO, KCH
NADEEM, S
LEE, WL
SODINI, CG
机构
[1] MIT,MICROSYST LAB,CAMBRIDGE,MA 02139
[2] MIT,DEPT ELECT ENGN & COMP SCI,MICROSYST TECHNOL LAB,CAMBRIDGE,MA 02139
来源
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS | 1990年 / 37卷 / 03期
关键词
D O I
10.1109/31.52724
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Oversampling interpolative coding has been demonstrated to be an effective technique for high resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown to not only greatly reduce oversampling requirements for high resolution conversion applications, but also to randomize the quantization noise to avoid the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Parameterized models are used for the system elements to determine the effects of circuit nonidealities on overall modulator performance. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. © 1990 IEEE
引用
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页码:309 / 318
页数:10
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